From xfree86-admin@XFree86.Org Wed Jul 2 12:05:37 2008 Return-Path: X-Original-To: xfree86@e.kevb.net Delivered-To: xfree86@e.kevb.net Received: from public.xfree86.org (xf86a.isc.org [204.152.186.177]) by e.kevb.net (Postfix) with ESMTP id 3B5A11043459 for ; Wed, 2 Jul 2008 12:05:37 -0400 (EDT) Received: from public.XFree86.Org (localhost [127.0.0.1]) by public.xfree86.org (Postfix) with ESMTP id 33E721D9FE; Wed, 2 Jul 2008 09:05:11 -0700 (PDT) Received: from rv-out-0708.google.com (rv-out-0708.google.com [209.85.198.245]) by xfree86.org (8.13.6/8.13.6) with ESMTP id m62G0R1D023785 for ; Wed, 2 Jul 2008 09:00:27 -0700 (PDT) (envelope-from vishnuvaradanr@gmail.com) Received: by rv-out-0708.google.com with SMTP id c5so430562rvf.10 for ; Wed, 02 Jul 2008 09:00:24 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:received:received:message-id:date:from:to :subject:cc:in-reply-to:mime-version:content-type:references; bh=dBkjFha4lHRoSFLLSrcBxqgydUt9ju4IbGbsLPG9Rmc=; b=EOFma8GxKOcM+5MjXaOVGLPuzSCGD6kKM5ZVCEEUA2sanYlIhcjn8MLQVrACuvI0S6 EwoNrWOnhLMWrh4J5lnii0ulWsLYXoHX/CwkEh1I39H65+mjO1u9sshsJTv+Op6P8MlG QrKh6NKRzFeIaFxsooVDmcAFjBX0WqpiylCeM= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=message-id:date:from:to:subject:cc:in-reply-to:mime-version :content-type:references; b=wTq3nZcZQM972scqgpSj+ngMTvnWjGMLzzxKW7NLA+G2iJ5J6H2OPmRtPuZAmR5pmc 0M40bLSPydihLMgp/IbkJEmMVkY01+UtePIwKXx/mkgT+oFiU9IsIFObYusUaEDxp3Hk unWTnJlbkgvnZdRtEhTJXS5foT23NIO6+6mZw= Received: by 10.140.191.14 with SMTP id o14mr4473737rvf.130.1215014424845; Wed, 02 Jul 2008 09:00:24 -0700 (PDT) Received: by 10.140.144.13 with HTTP; Wed, 2 Jul 2008 09:00:24 -0700 (PDT) Message-ID: <440e0a9b0807020900r4ac41d52y9b4e2fdb39b9434f@mail.gmail.com> From: "vishnuvaradan vishnuvaradan" To: xfree86@xfree86.org Subject: Re: [XFree86] x not listing the pci Bus 1 I/O range: Cc: "Marc Aurele La France" In-Reply-To: MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="----=_Part_8366_4523497.1215014424838" References: <440e0a9b0807010832h23831d6csfac91942d1553026@mail.gmail.com> Reply-To: xfree86@xfree86.org X-Spam-Checker-Version: SpamAssassin 2.63 (2004-01-11) on public.xfree86.org X-Spam-Status: No, hits=0.3 required=6.0 tests=HOT_NASTY,HTML_MESSAGE, UPPERCASE_25_50 autolearn=no version=2.63 X-Spam-Level: Sender: xfree86-admin@XFree86.Org Errors-To: xfree86-admin@XFree86.Org X-BeenThere: xfree86@XFree86.Org X-Mailman-Version: 2.0.9 Precedence: bulk List-Unsubscribe: , List-Id: XFree86 Debugging Issues List-Post: List-Help: List-Subscribe: , List-Archive: Date: Wed, 2 Jul 2008 21:30:24 +0530 ------=_Part_8366_4523497.1215014424838 Content-Type: multipart/alternative; boundary="----=_Part_8367_12186758.1215014424838" ------=_Part_8367_12186758.1215014424838 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit Content-Disposition: inline Hi , It seems likely that the bridge at 0:2:0 is not, in reality, forwarding I/O > transactions to bus 1 because the I/O enable bit in its command register is > off. The output from `scanpci -v` would confirm this. I listed the scanpci -v the i/o bit for the corresponding device is enabled pci bus 0x0000 cardnum 0x02 function 0x00: vendor 0x10b5 device 0x6520 PLX Technology, Inc. Device unknown STATUS 0x02b0 COMMAND 0x0007 CLASS 0x06 0x04 0x00 REVISION 0xcb HEADER 0x01 LATENCY 0x80 PRIBUS 0x00 SECBUS 0x01 SUBBUS 0x01 SECLT 0xf2 SECSTATUS 0x22a0 IOBASE 0xf2000000 IOLIM 0xf2000fff NOPREFETCH_MEMBASE 0x9bf00000 MEMLIM 0x9fffffff PREFETCH_MEMBASE 0x000000009be00000 MEMLIM 0x000000009befffff NO_FAST_B2B NO_SEC_BUS_RST NO_M_ABRT NO_VGA_EN NO_ISA_EN NO_SERR_EN NO_PERR_EN the i/o bit is enabled for the graphics card also I have some queries 1. Assuming its not i/o issue what may be the reason that the kernel is giving bad memory access when its trying to load EDID data and finding dpms capabilities( please refer to the verbose message i have attached).. 2. I need to know whether xfree has some kernel dependency ( like in menuconfig something we need to enable for xfree) ?? 3. If I skip loading the library of i2c and ddc .. the kernel is not reporting any bad access error It in turn reports screen found but none is in usable configuration... Is that i need to analyze in i2c and ddc driver of siliconmotion chip ?? Thanks for your attention and replies ------=_Part_8367_12186758.1215014424838 Content-Type: text/html; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit Content-Disposition: inline Hi ,

It seems likely that the bridge at 0:2:0 is not, in reality, forwarding I/O transactions to bus 1 because the I/O enable bit in its command register is off.  The output from `scanpci -v` would confirm this.

   I listed the scanpci -v the i/o bit for the corresponding device is enabled
   pci bus 0x0000 cardnum 0x02 function 0x00: vendor 0x10b5 device 0x6520
   PLX Technology, Inc.  Device unknown
  STATUS    0x02b0  COMMAND 0x0007
  CLASS     0x06 0x04 0x00  REVISION 0xcb
  HEADER    0x01  LATENCY 0x80
  PRIBUS    0x00  SECBUS 0x01  SUBBUS 0x01
  SECLT     0xf2  SECSTATUS 0x22a0
  IOBASE    0xf2000000  IOLIM 0xf2000fff
  NOPREFETCH_MEMBASE 0x9bf00000  MEMLIM 0x9fffffff
  PREFETCH_MEMBASE   0x000000009be00000  MEMLIM 0x000000009befffff
  NO_FAST_B2B NO_SEC_BUS_RST NO_M_ABRT NO_VGA_EN NO_ISA_EN NO_SERR_EN NO_PERR_EN
  
  the i/o bit is enabled for the graphics card also

I have some queries
1. Assuming its not i/o issue what may be the reason that the kernel is giving bad memory access when its trying to load EDID data and finding dpms capabilities( please refer to the verbose message i have attached)..

2. I need to know whether xfree has some kernel dependency ( like in menuconfig something we need to enable for xfree) ??

3. If I skip loading the library of i2c and ddc .. the kernel is not reporting any bad access error
    It in turn reports screen found but none is in usable configuration... Is that i need to analyze in i2c and ddc driver of siliconmotion chip ??



Thanks for your attention and replies






 

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